Apple Darwin Manuel d'utilisateur télécharger pdf (Page 29)

DescriptionIntel 64 Architecture 64-bit variantIA32 32-bit register

All of the new registers (R8 through R15) added in the Intel 64 architecture instruction set can also be accessed

as 32-bit, 16-bit, and 8-bit registers. For example, register R8 can be addressed in the following ways:

DescriptionRegister name

A 64-bit register.R8

A 32-bit register containing the bottom half of R8.R8d

A 16-bit register containing the bottom half of R8d.R8w

An 8-bit register containing the bottom half of R8w.R8l (Lowercase “l”)

Note: When you assign a value to the 32-bit version of these registers, the value is automatically

zero extended to fill the corresponding 64-bit register. To sign extend during assignment, use the

movsx instruction instead.

In addition to adding general-purpose registers, the Intel 64 Architecture instruction set has eight additional

vector registers. In the IA32 instruction set, the vector registers are numbered XMM0 through XMM7. The Intel

64 Architecture instruction set extends this by adding XMM8 through XMM15.

Instruction Changes

Most IA32 instructions can take 64-bit arguments. All IA32 instruction set extensions up through SSE3 are

included as part of the Intel 64 Architecture. In addition, a number of new instructions have been added.

A complete list of these changes is beyond the scope of this document. For information on these changes, see

the links in For More Information (page 29).

For More Information

For more information on porting and optimizing Intel assembly language code for 64-bit, you should also read:

●

OS X ABI Mach-O File Format Reference—ABI documentation for OS X.

Making Code 64-Bit Clean

Porting Assembly Language Code

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Apple Darwin Manuel d'utilisateur Page 29